Pusit Kulkasem

Lecturer
Department of computer science, Science Faculty,
Burapha University Chonburi Thailand 20131

Phone: +66-38-745-900 int 3062
Fax: +66-38-393-240

Email: pusit@buu.ac.th

Biography

Research Interests

Publication

  • Pusit Kulkasem, Shinichi Yamagiwa, Naoki Ito, Naoki Yonezawa, Koichi Wada, Design and Implementation of Message Passing Library for PC Cluster Maestro, Proc. of IEEE Pacific Rim Conf. on Communications, Computers and Signal Processing,1999 August
  • Ayman.N. M. Al-Khoury, Takeshi Yamazaki, Naoki Yonezawa, Shinichi Yamagiwa, P. Kulkasem, Masaaki Ono, Koichi Wada, Fine-Grain Update Control Protocol for a Distributed Shared Memory System, Proc. of IEEE Pacific Rim Conf. on Communications, Computers and Signal Processing, pp. 125-129, 1997 August
  • Takeshi Yamazaki, Naoki Yonezawa, Pusit Kulkasem, Shinichi Yamagiwa, Masaaki Ono, Ayman. N. M. Al-Khoury, Koichi Wada, SVCP: A Cache Coherency Protocol with Explicit Update Subscription, proceedings of the 1998 International Conference on Parallel and Distributed Processing Techniques and Application (PDPTA98), pp.899-906, 1998 July.
  • Shinichi Yamagiwa, Masaaki Ono, Takeshi Yamazaki, Pusit Kulkasem, Masayuki Hirota, Koichi Wada, Maestro-Link: A High Performance Interconnect for PC Cluster, Lecture Note in Computer Science 1482 Field-Programmable Logic and Applications FPL98), pp.421-425,1998 August.
  • Takeshi Yamazaki, Pusit Kulkasem, Shinichi Yamagiwa, Ayman Al-khoury N.M, Naoki Yonezawa, Koichi Wada, Selective Validity Control Protocol : A New Coherence Protocol for Distributed Shared Memory, Joint Symposium on Parallel Processing(JSPP'97), pp 329-336, May 1997(in Japanese)
  • Shinichi Yamagiwa, Pusit Kulkasem, Koichi Wada, Design and Implementation of Message Passing Library on Maestro PC Cluster, IPSJ High Performance Computing SIG Research Report, May 2000(in Japanese)

 

Teaching

Instructor